1. Technical Field
Embodiments of the present invention relate to a power source circuit of a display apparatus, and more particularly to a power source circuit of a display apparatus, capable of preventing an operation failure by reducing power consumption.
2. Discussion of Related Art
A liquid crystal display (LCD) includes a liquid crystal display panel including a lower substrate, an upper substrate facing the lower substrate, and a liquid crystal layer interposed between the lower and upper substrates, for displaying an image. The liquid crystal display panel further includes a plurality of gate lines, a plurality of data lines, and a plurality of pixels connected to the gate and data lines.
The LCD further includes a gate driver and a data driver. The gate driver may sequentially output gate pulses to the gate lines and the data driver outputs pixel voltages to the data lines. The gate and data drivers may be provided in the form of a driving chip and mounted on a film or the liquid crystal display panel.
FIG. 1 is a view showing an example of supplying a current to a driving chip 10 of a data driver. The driving chip 10 includes first and second power terminals 11 and 12. The first power terminal 11 of the driving chip 10 receives a supply voltage AVDD, and the second power terminal 12 receives a ground voltage VSS. Power consumed by the liquid crystal display panel may correspond to the power supply voltage AVDD multiplied by a current IA applied to the first power terminal 11. Further, power consumed by the driving chip 10 may be identical to the power consumed by the liquid crystal display panel.
High-speed driving schemes have been continuously developed to improve image quality due to the ever increasing size of liquid crystal display panels. In these schemes, the level of the supply voltage AVDD relative to the ground voltage VSS has been gradually raised over time. For example, in one embodiment, the supply voltage AVDD has been increased to about 15V. The increased supply voltage AVDD results in a larger potential difference between the supply voltage AVDD and the ground voltage VSS, thereby increasing power consumption. Further, the increase in power consumption increases the operating temperature of the driving chip 10, which may result in an operation failure.